1. Field of the Invention
This invention relates to a semiconductor device which is formed with elements such as MOS (metal oxide semiconductor) transistors in its semiconductor substrate.
2. Description of the Related Art
Hitherto, various semiconductor devices have been proposed, and particularly those containing MOS transistors are used widely. For such semiconductor devices, microminiaturization of the element structure is advanced to increase the degree to which the elements are integrated into the semiconductor device.
For many of conventional semiconductor devices, a number of MOS transistors are formed in a predetermined area of a flat semiconductor substrate, such as a silicon substrate. In this case, with a gate region covered with a gate electrode via an insulating thin layer, the regions on both sides of the gate region are doped with ions to form source and drain regions for making a MOS transistor in a predetermined area of a semiconductor substrate. Various problems will arise from microminiaturizing such MOS transistors of semiconductor devices: As an electric field around a drain increases, a drain depletion layer extends to near a potential barrier nearby a source, causing a punch through current to occur (short channel effect); as the electric field strength in an channel increases, carrier energy increases and electron-hole pairs are generated because of ionization by collision (hot carrier effect); and an electric field in the vertical direction of channel becomes large and the carrier mobility becomes small and isolation between adjacent elements becomes insufficient. Therefore, conventional semiconductor devices have a problem of an incapability of maintaining sufficient performance or reliability if the gate length is made submicron or less.
On the other hand, SOI (silicon on insulator) ultrathin film transistors are proposed to overcome these problems. The SOI ultrathin film transistor is formed on a silicon ultrathin film on an insulating film and source, gate, and drain regions are formed on the silicon ultrathin film. Since the ultrathin film transistor is formed on the silicon ultrathin film on the insulating film, the short channel effect and the hot carrier effect can be reduced and a potential in the entire channel can be controlled; resultantly, an electric field in the vertical direction can be made small to maintain large carrier mobility and excellent isolation between the elements can be provided.
However, because of its structure, the ultrathin film transistor requires formation of a silicon ultrathin film to form the transistor on the insulating film. Yet technologically it is very hard to form a single crystal layer of silicon on an insulating film, such as SiO.sub.2. Particularly, a good epitaxial film of silicon cannot be formed at present and it is difficult to provide SOI ultrathin film transistors with desirable performance.
On the other hand, proposed as a semiconductor device which provides a similar effect to that of the SOI ultrathin film transistor is a vertical ultrathin film transistor with source, channel, and drain regions formed within an extremely thin projection on a silicon substrate. Specifically, the projection is formed on the silicon substrate by an isotropic etching, then field oxidation is executed with the projection covered with silicon nitride for isolating the silicon substrate and the projection from each other by a resultant field oxide layer. The projection can be formed as a single crystal of silicon and further the transistor is formed within the projection, thus the integration degree can be raised furthermore. Such a semiconductor device is described in, for example, Japanese Patent Laid-Open No. Hei 2-263473.
However, the vertical ultrathin film transistor requires that field oxidation should be executed with the projection covered with an oxidation-resistant film, such as Si.sub.3 N.sub.4, to form a field oxide layer up to the bottom of the projection for isolating the channel section and substrate from each other, as described above. Therefore, in the field oxidation step, there is a risk of crystal being damaged in the channel section, and the transistor cannot be provided with enough performance. Further, since the channel section is isolated completely from other regions by the field oxide film, if ionization by collision occurs in the channel section, excess carriers of the same polarity stay here and potential shifts, causing various hindrances to occur. Since the field oxide layer is low in thermal conductivity, sufficient heat radiation cannot be accomplished. Further, since the oxide layer formed by field oxidation differs from a gate oxide film in properties, the residual stress on that oxide layer will be large.